1. Field of the Invention
The invention relates to a method and apparatus for switching currents.
2. Description of the Related Art
In a switching voltage regulator application, there is a need to drive loads at varying current levels and at relatively high switching speeds. A current switching circuit in a switching regulator should have low power dissipation and be able to be switched at high speeds.
In a conventional type of switching circuit shown in FIG. 2, a load 2 is coupled to two field effect transistors (FETs) 4 and 6, each selectively switched on and off by control logic 8 to drive load 2 at a certain current level determined by current limiting resistors 10 and 12. Control logic 8 responds to input signals IN1 and IN2.
Consider the case where load 2 is presently driven low by the "on" state of FET 6, with FET 4 in the "off" state, and it is now desired to drive the load 2 high. Input signals IN1 and IN2 appropriate to the configuration of FET 6 "off" and FET 4 "on" are received by control logic 8 to initiate the switching. Control logic 8 then drives the gate of FET 4 high and the gate of FET 6 low.
In prior art switching circuits, as illustrated in FIG. 2, gates of FETs 4 and 6 are directly coupled to circuits in control logic 8 which output a fixed voltage to charge the gates of FETs 4 and 6. For the turn-on of FET 4 or FET 6, there is a delay incurred while building up charge on the gate of FET 4 or FET 6 to the level required for turn-on of FET 4 or FET 6. A similar delay is incurred during turn-off of FET 4 or FET 6, where the gate must be discharged before reaching the level for turn-off. It is desirable to reduce the delay associated with gate charge build up and gate discharging in the switching transistors to obtain faster switching.
During switching from the FET 4 off/FET 6 on states to the FET 4 on/FET 6 off states, there is a period of time when both FETs 4 and 6 are simultaneously on, or partially on, due to the delay in transitions between the off and on states. During this time period, the circuit is subject to cross-conduction, wherein current flows through the channels of both FETs 4 and 6, unnecessarily dissipating power, and stressing circuit elements. It is therefore desirable to eliminate cross-conduction in switching circuits in order to conserve power and protect circuit elements.
For a load 2 which draws large inrush currents, such as a capacitive load or incandescent lamp, both load and switching circuit elements may be damaged during the initial surge of current. It is therefore desirable to protect circuit elements in a switching regulator from such inrush currents.